Sigma-Delta Modulation (SDM) is widely used in various electronic components, e.g. an analog-to-digital converter, a switching capacitor filters a, frequency synthesizer and a wireless communication system. When applying to the analog-to-digital converter, since the SDM has a feature of noise shaping, if the higher order the SDM has, the better the effect of noise shaping is. It has an advantage of increasing signal-to-noise ratio for signals. Because an SDM of n order needs n integrators to implement, when an architecture of a SDM of 2 orders or higher is used, power consumption and circuit area will increase. In addition, the higher order the SDM has, the more unstable the circuit becomes.
In the Taiwan Patent No. 1350067, an architecture of a sigma-delta analog to digital conversion modulator is disclosed. In multi-integrators, a feed forward connecting method is applied to increase the stability of the system. However, it requires an adder, a gain amplifier and a quantizer to generate output signals. Complex circuit architecture increases circuit area and power consumption.
In Taiwan Patent No. 1437826, a sharing integrator is disclosed. When the sharing integrator uses a sigma-delta analog to digital conversion modulator of n order, only n/2 (when n is even) or (n+1)/2 (when n is odd) integrators are required. According to the operating method disclosed in the invention, each integrator processes integral operation twice to implement functions of the sigma-delta analog to digital conversion modulator of n order. Area and power consumption of the electronic system can be reduced. Defect in the invention is when it is applied to a sigma-delta analog to digital conversion modulator of 3 orders or higher, n/2 or (n+1)/2 integrators are serially connected. Directly serial connection of serial integrators would lead to instability of the circuit system. Meanwhile, the number of the integral operation will increase as the number of the integrators increases. Totally, it needs n or (n+1) integral operations. Operating speed of the system will drop. Take the sigma-delta analog to digital conversion modulator of 3 orders as an example. The architecture requires 2 integrators and 4 integral operations in total. Comparing to a sigma-delta analog to digital conversion modulator of 2 orders, it only requires 2 integral operations. When the invention is applied to the analog-to-digital converter, converting speed of the sigma-delta analog to digital conversion modulator of 3 orders is only half of that of the analog-to-digital converter, converting speed of the sigma-delta analog to digital conversion modulator of 2 orders.
In view of the problems from existing techniques, a feed forward sigma-delta analog to digital conversion modulator is provided by the present invention is disclosed. It integrates a feedback circuit, an adder circuit a quantization circuit. Architecture of the integrated circuit has an advantage of high stability and needs no active circuit. A control circuit uses a successive approximation register needs one comparator to achieve functions of a multi-bit quantization.